Karakteristik Sistem Memori Komputer

Presentasi berjudul: "Karakteristik Sistem Memori Komputer"— Transcript presentasi:

1 Karakteristik Sistem Memori Komputer
Chapter 4 Cache Memory Karakteristik Sistem Memori Komputer Lokasi / Location Kapasitas / Capacity Satuan transfer / Unit of transfer Metode akses / Access method Kinerja / Performance Tipe fisik / Physical type Karakteristik fisik / Physical characteristics Organisasi / Organisation

2 Location Capacity CPU Internal ( Main memory)
External ( Secondary memory: disk, tape) Capacity Word size / ukuran word Satuan untuk memori internal, kalau external umumnya byte=8bit. Word biasanya = banyak bit yg digunakan untuk representasi bilangan dan panjang instruksi Sayangnya banyak pengecualian, contoh: CRAY C90 1 word=64-bit, tetapi bil integer 46-bit. VAX mempunyai panjang instruksi berbeda-beda dan ukuran Word 32-bit

3 Unit of Transfer Internal External Addressable unit
Banyaknya bit yg dibaca atau ditulis ke dlm memori pd suatu saat Tidak pasti sama dgn word atau addressable unit External Usually a block which is much larger than a word Addressable unit Smallest location which can be uniquely addressed Dalam beberapa sistem addressable unit=word

4 Access Methods (1) Sequential
Akses dgn urutan linear (tergantung dari urutan akses sebelumnya) Access time depends on location of data and previous location e.g. tape Direct Individual blocks have unique address Access dgn lompat ke lokasi sekitarnya, kemudian dilakukan sequential search Access time depends on location and previous location e.g. disk

5 Access Methods (2) Random Associative
Setiap lokasi yg dpt dialamati pd memori mempunyai suatu yang unik. Access time is independent of location or previous access e.g. RAM Associative Data dpt ditemukan kembali dengan berdasarkan isinya dibanding dgn alamatnya, secara simultan. e.g. cache

6 Memory Hierarchy Karakteristik penting memori
Harga Kapasitas Waktu akses Semakin cepat waktu akses semakin besar harga per bit Semakin besar kapasitas semakin kecil harga per bit Semakin besar kapasitas semakin lambat akses

7 Memory Hierarchy - Diagram

8 Performance Access time Memory Cycle time Transfer Rate
Untuk RAM : Waktu dari suatu alamat diberikan ke memori sampai data dapat digunakan Untuk Non RAM : Waktu yg dibutuhkan untuk melakukan mekanisme read-write pd lokasi yg diinginkan Memory Cycle time Cycle time is the time, usually measured in nanosecond , between the start of one random access memory ( RAM ) access to the time when the next access can be started access time + recovery Transfer Rate Rate at which data can be moved

9 Physical Types Semiconductor RAM Magnetic Disk & Tape Optical CD & DVD

10 Physical Characteristics
Ketahanan Volatility Erasable Power consumption

11 Hierarchy List Registers L1 Cache L2 Cache Main memory Disk cache Disk
Optical Tape

12 Locality of Reference During the course of the execution of a program, memory references tend to cluster e.g. loops

13 Cache Small amount of fast memory
Sits between normal main memory and CPU May be located on CPU chip or module

14 Cache operation - overview
CPU requests contents of memory location Check cache for this data If present, get from cache (fast) If not present, read required block from main memory to cache Then deliver from cache to CPU Cache includes tags to identify which block of main memory is in each cache slot

15

16

17 Cache Design Size / ukuran cache Mapping Function
Direct, Associative, Set Associative Replacement Algorithm LRU, FIFO, LFU, Random Write Policy Write through, Write back, Write once Block Size Number of Caches Single or two level

18 Size menentukan … Cost Speed More cache is expensive
More cache is faster (up to a point) Checking cache for data takes time Semakin besar cache maka semakin besar jumlah gate, shg cenderung lebih lambat

19 Typical Cache Organization

20 Mapping Function Contoh: Cache dapat menampung 64Kbyte
Cache block = 4 bytes cache = 16k lines, masing-masing 4 bytes Jika 16 Mbytes main memory (berarti 4M blok masing-masing 4 byte) 24 bit address (224=16M)

21 Comparison of Cache Sizes

22 Direct Mapping Teknik yg paling sederhana, dengan memetakan setiap blok dari memori utama hanya ke satu baris cache Pemetaan dinyatakan dgn i = j modulo m i = nomor baris cache j = nomor blok memori utama m = jumlah baris yg terdapat didalam cache

23 Direct Mapping Address Structure
Tag s-r Line or Slot r Word w 14 2 8 24 bit address 2 bit word identifier 8 bit tag (=22-14) 14 bit slot or line No two blocks in the same line have the same Tag field Check contents of cache by finding line and checking Tag

24 Direct Mapping Cache line Main Memory blocks 0 0, m, 2m, 3m…2s-m
. . m-1 m-1, 2m-1,3m-1…2s-1 m = Number of line in cache Block : 0,m,2m,3m dst mod m => 0

25 Direct Mapping Cache line Main Memory blocks
, , …, FF0000 , , …, FF0004 . . FFFC, 01FFFC,…,FFFFFC Contoh diatas untuk : m=16K => 2^14 I = j modulus 2^14

26 Direct Mapping Cache Organization

27 Direct Mapping Example

28 Direct Mapping Summary
Address length = (s + w) bits Number of addressable units = 2s+w words or bytes Block size = line size = 2w words or bytes Number of blocks in main memory = 2s+ w/2w = 2s Number of lines in cache = m = 2r Size of tag = (s – r) bits

29 Direct Mapping Simple Inexpensive Fixed location for given block
If a program accesses 2 blocks that map to the same line repeatedly, cache misses are very high

30 Associative Mapping A main memory block can load into any line of cache Memory address is interpreted as tag and word Tag uniquely identifies block of memory Every line’s tag is examined for a match Cache searching gets expensive

31 Fully Associative Cache Organization

32 Associative Mapping Example

33 Associative Mapping Address Structure
Word 2 bit Tag 22 bit 22 bit tag stored with each 32 bit block of data Compare tag field with tag entry in cache to check for hit Least significant 2 bits of address identify which 16 bit word is required from 32 bit data block e.g. Address Tag Data Cache line FFFFFC 3FFFFF FFF

34 Associative Mapping Summary
Address length = (s + w) bits Number of addressable units = 2s+w words or bytes Block size = line size = 2w words or bytes Number of blocks in main memory = 2s+ w/2w = 2s Number of lines in cache = undetermined Size of tag = s bits

35 Set Associative Mapping
Cache is divided into a number of sets Each set contains a number of lines Blok Bj dpt dipetakan ke sembarang baris pada set ke-i e.g. 2 lines per set 2 way associative mapping

36 Set Associative Mapping Example
13 bit set number Block number in main memory is modulo 213 000000, 00A000, 00B000, 00C000 … map to same set

37 Two Way Set Associative Cache Organization

38 Set Associative Mapping Address Structure
Word 2 bit Tag 9 bit Set 13 bit Use set field to determine cache set to look in Compare tag field to see if we have a hit e.g Address Tag Data Set number 1FF 7FFC 1FF FFF 001 7FFC FFF

39 Two Way Set Associative Mapping Example

40 Algoritma Pergantian (Replacement Algoritm)
Untuk Fully Associative dan Set Associative memerlukan Algoritma pergantian Algoritma LRU (Least Recently Used) Mengganti blok yg berada dlm set paling lama tidak direference Algoritma FIFO (First In First Out) Mengganti blok yg paling lama berada dlm set Algoritma LFU (Least Frequently Used) Mengganti blok dlm set yg direference paling sedikit

41 Write Policy Write through Write back
Semua operasi tulis dibuat langsung ke memori utama, untuk memastikan bahwa memori utama selalu valid Write back Update hanya dilakukan dlm cache saja