Riset Grup Embedded and Digital Design

Presentasi berjudul: "Riset Grup Embedded and Digital Design"— Transcript presentasi:

1 Riset Grup Embedded and Digital Design
Inside XSA-50 Presented by Riset Grup Embedded and Digital Design PENS-ITS 2010

2 One meter view

3 Diagram block

4 Feature (1) Programmable logic
50-Kgate XS2S50 SpartanII FPGA 144pin PQFP, berfungsi sbg tempat utama programmable logic XC9572XL CPLD, berfungsi untuk mengkonfigurasi FPGA via paralel port dan mengontrol penulisan ke Flash RAM

5 Feature (2) Programmable Oscillator
Dallas DS1075 programmable oscillator Maksimum clock 100Mhz Minimum clock 48.7KHz Memprogram pembagi clock menggunakan GXSSETCLK

6 Feature (3) Synchronous DRAM
Buatan Hynix HY57V641620HGT-H atau Samsung K4S641632F-TC75000 Kapasitas 4M x 16-bit

7 Feature (4) Flash RAM Buatan Atmel AT49F001 Flash RAM
Kapasitas 128K x 8-bit

8 Feature (5) 7-segmen Aktif high 4-position DIP Switch
Aktif low, posisi ON menyebabkan pin yang terhubung ke switch tersambung ke ground. Bila tidak digunakan letakkan pada posisi OFF Resources sharing !

9 Resources sharing

10 Feature (6) PS/2 Port Pushbutton

11 Feature (7) VGA Monitor Interface

12 Feature (8) Paralel Port Interface Hati-hati dg resource conflict
Baca manual

13 Feature (8) Paralel Port Interface

14 Feature (9) Prototype header

15 SpartanII architecture

16 CLB capacity

17 Inside a CLB A CLB contain 2 slice XC2S100 has 16x24 CLB matrix
Or 768 slice

18 Let’s program the board