Chassis EURO-7 Penjelasan Rangkaian

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1 Chassis EURO-7 Penjelasan Rangkaian
Introduction We at Panasonic realise that the service engineer needs to understand the circuitry inside the TV and for this need, we have produced this Technical Guide. This Technical Guide contains information for Euro 7 chassis and should be used in conjunction with the relevant Service Manuals for this chassis. As the Technical Guide for the Euro 7 chassis covers such a wide range of models, some differences may occur in circuit descriptions and component references. Where these differences occur, they will be highlighted by (Italic with brackets). Chassis EURO-7 Penjelasan Rangkaian Tech.support 0505

2 Chassis EURO-7 Isi : 1. Garis Besar 2. Video Processing
3. Digital Processing (DG) 4. Defleksi 5. Kontrol 6. Audio 7. Catu Daya

3 1 Garis Besar 1-1 Fitur Utama 1. 100 Hz High Picture Quality
GIGA(Geometric Interlace Generation Algorithm) Scan Progressive (NTSC) Digital Cinema Reality 2. Fungsi-fungsi Surround Dolby Digital / dts / Dolby 2-Tuner Double Window MPU dengan ‘500page Teletext’ OSD ‘European Graphics’

4 Struktur Chassis L GM Z H DP DG U A DF D GK CRT Audio Drive Out
Koreksi Geomagnetic H Z Input Terminal Audio Processor GM A DP DG Digital Processor MPU Teletext U D Fokus Dynamic DF GK PCB Utama Power/ Defleksi Front Terminal

5 2 VIDEO PROCESSING 1) Switching AV 2) RGB processor

6 2-1 Switching AV

7 2-2 RGB Processor The RGB signals fed to the colour output stage are fed from the RGB processor IC1315 located on the A-Board from pins 19 (B), 21 (G) and 23 (R) where the RGB signals are buffered by transistors Q1301, Q1302 and Q1340. From here the RGB signals are fed via connectors A21-L1 pins 3, 4 and 5, where they are fed directly to IC351 pin 3 (R), IC352 pin 3 (G) and IC353 pin 3 (B). Colour Output Stage In order to avoid damage caused by long cathode lines and thereby trim the frequency response, the RGB output stage is mounted on the CRT board. Each colour channel has an IC with a signal bandwidth of > 10 MHz guaranteeing high resolution even with rapid signal transitions in both directions. The circuits for the three colour channels are identical. The use of ICs means that the number of components in the output stages can be reduced to a minimum. The RGB signals are fed via connector L1 pins 6, 5, and 3 to pin 3 of the video output amplifier ICs IC351, IC352 and IC353 to the inverting input of an operational amplifier via an R/C combination. The non-inverting input and thus the operating point is determined via pin 1. The negative feedback to determine the amplification factor is provided by the resistance between pin 9 and pin 3. The signals are output at approximately 160Vpp maximum via pin 7 and 8 to drive the CRT cathodes. The actual drive signal is input from pin 8 and a correcting signal from pin 7 in order to allow automatic dark current regulation. The ICs contain one other stage used for temperature compensation and a circuit for coupling out instantaneous current. The current information can be read at pin 5 thereby creating an automatic black level regulation circuit (cut-off regulation circuit) with an additional scan regulating circuit.

8 3 DIGITAL PROCESSING 1) Struktur Rangkaian 2) Global Core 3) Operasi GIGA (VDU) Teknologi 100Hz Teknologi Progressive 4) Cinema Reality 5) Global Core Output stage

9 GC1 untuk Sub-channel VDU Utama GC1 untuk channel utama RGB Processor
3-1 Struktur Rangkaian Sub GC1 untuk Sub-channel IC MB87L1067 ・10bit A/D ・Color Decoding dengan Comb Filter VDU IC SDA9415 ・100Hz/・Scan Progressive ・Estimasi Gerakan, Kompensasi Gerakan ・Zoom Vertical ・PNR(Berbasis Gambar) ・PIP/PAP/POP CVBS/YC New CIP IC1303 ・Burst Lock to Line Lock Conversion. R R DRIVE TDA6111Q Utama RGB Processor IC AN5394 Auto W/B Koreksi Dynamic Gamma Kontrol Dynamic Sharpness Kontrol Picture Contrast, Brightness, Colour ACL (Auto Contrast Limitter) GC1 untuk channel utama IC MB87L10671 ・Color Decoding dengan Comb Filter ・Kontrol Defleksi ・Zoom-H,Just,H-Comp ・LTI,CTI,Kontrol Sharpness YUV CVBS/YC G G DRIVE TDA6111Q B B DRIVE TDA6111Q Micro Controller IC1101 SDA6000 ・Tuning ・Built in Teletext Decoder ・Graphics OSD OSD/Text

10 3-2 Tingkat input Global Core
KONVERSI SYNC.LOCK BURST ke LINE IC1301 GLOBAL CORE IC1303 CIP

11 3-3 VDU (Teknologi GIGA) GIGA
IC1305 SDA9415 KONVERSI FORMAT H/V LINE DETEKSI LETTER BOX GIGA KOMPENSASI GERAKAN 50/100Hz KONVERTER SCAN RATE KONVERTER I/P MULTIPLEX P in P P out P P and P UTAMA YUV dari GC1 YUV KONVERSI FORMAT H/V LINE ke GC1 SUB YUV From GC2

12 Teknologi GIGA 100Hz (PAL)
= 1 Frame = = 1 Frame = PAL (50Hz) < / > < / > < / > < / > <PAL> TAU1 (100Hz) = 1 Frame = = 1 Frame = = 1 Frame = = 1 Frame = 1/100 1/100 1/100 1/100 1/100 1/100 1/100 1/100 <PAL> GIGA 100Hz = 1 Frame = = 1 Frame = = 1 Frame = = 1 Frame = 1/100 1/100 1/100 1/100 1/100 1/100 1/100 1/100 menciptakan Motion Compensated intermediate frames

13 Keuntungan Nyata dengan GIGA Progressive
NTSC (60Hz) = 1 Frame = = 1 Frame = = 1 Frame = 1/60 1/60 1/60 1/60 1/60 1/60 GIGA Progressive <NTSC> 1/60 1 Frame 1/60 1 Frame 1/60 1 Frame 1/60 1 Frame 1/60 1 Frame 1/60 1 Frame menciptakan motion compensated intermediate lines

14 Menciptakan motion compensated intermediate lines
Conventional Copy Motion Compensation GIGA Progressive

15 3-4 Tingkat Output Global Core
IC /2 LTI Luminance Transient Improver CTI Colour KONVERTER D/A Y Pb YUV Pr dari VDU VM KONTROL DEFLEKSI H.Drive H.Sync. V.Drive V.Sync. DAF CLOCK CLAMP

16 4 RANGKAIAN DEFLEKSI 1) Vertical Drive 2) Horizontal Drive 3) Fokus Dynamic 4) Koreksi Geomagnetic

17 - 4 - 1 Vertikal Drive + 1) Pembangkit Saw tooth (DG board) IC1301 GC1
DEFLEKSI DG-A44 170 5 3 3 + - To drive the vertical output stage a drive pulse is fed from the DG-Board via connector A44 pin 24. Here the signal is fed to the vertical output IC IC451, which consists of an operational amplifier. The vertical drive pulse in the form of a sawtooth is fed to pin 6 of IC451, which is the inverting terminal of the internal op-amp, the results of which are output via pin 3. 1 24 171 2 6 2

18 7 4 8 9 10 3 5 6 +Vcc -Vcc 2 IC451 V-DY +Vcc +Vcc
2) Output Vertikal 1-2 - + 7 4 8 9 10 3 5 6 +Vcc -Vcc 2 IC451 This vertical output IC IC451 consists of an operational amplifier to which the vertical drive pulse in the form of a sawtooth is passed, the results of which are output via pin 3. The gain of the internal op-amp is controlled by the negative feedback pulse which is fed via R453, connected between pins 3 and 6 of IC451. IC451 also contains two pump-up circuits which are used to provide a switching voltage for the vertical flyback period. This is required as the energy requirement of the vertical output stage is highest during flyback, as the electron beam has to be passed rapidly from the bottom right hand corner of the screen to the top left corner of the screen. This brief additional energy requirement is met by increasing the supply voltage available to the output stage to almost 3 times the supply. V-DY +Vcc +Vcc

19 + = + +Vcc +Vcc 3Vcc 2) Output Vertikal 2-2 7 4 8 9 10 3 5 6 +Vcc -Vcc
Perioda Blanking - + 7 4 8 9 10 3 5 6 +Vcc -Vcc 2 IC451 During vertical sweep, the bootstrap capacitor C457 / C450 is charged up to almost supply voltage via D453, D450. The output of the pump-up generators pins 8, 9 and 10 of IC451 are at this moment at ground potential. As a result of the DC displacement at the negative pole of capacitor C457 / C450 (rising to the supply voltage), build up of the supply voltage for the output stage at pin 3 rises to almost three times the supply voltage. At the same time, D453, D450 are reverse biased and thus prevents discharge of C457 / C450 into the supply line. Vertical Protection The vertical protection circuit is made up of transistor Q451, which monitors the state of the vertical output and feeds the result back to the MPU IC1101 pin 127. Under normal condition, where there are no errors, capacitor C451 is charged via diode D452 which applies a High level to the base of Q451. This High level results in transistor Q451 conducting resulting in a Low level being applied via diode D454 and connectors A1-D1 pin 6, to the base of protection transistor Q854 via the biasing resistor R871. Q854 is switched OFF, Pin 127 of the MPU IC1101 (located on the E-board) is thus held High via resistor R1153. This High level ensures that the MPU IC1101 is inoperative. Where an error in the vertical deflection circuit occurs, capacitor C451 discharges via resistor R468. Once capacitor C451 has discharged transistor Q451 switches OFF and a High level is fed via pull up resistor R469, to connectors A1 - D1 pin 6. This High which fed to the D-Board is then fed to the base of protection transistor Q854. With a High level applied to Q854, the transistor switches ON and pin 127 of the MPU IC1101 (located on the A-Board) is pulled Low. This results in the TV being switched into standby mode after a short delay. V-DY + = + +Vcc +Vcc 3Vcc

20 4 - 2 Horisontal Drive Horizontal Drive
The line frequency pulses for the horizontal driver stage are produced on the DG-Board and fed to the A-Board via connectorA44 pin This horizontal drive signal is then fed to the monostable multivibrator IC459 pin The transistors Q460 / Q461 are then used to trigger the multivibrator operation,which produces the the horizontal drive signal output via pin 5. This horizontal drive signal is then fed via the D-Board via connectors A3-D3 pin 10. Here the horizontal drive pulse is fed to the Gate of Q501. Zener Diode D502 being used to protect the gate - source junction of Q501 against over-voltage. The circuit of the line buffer stage, as well as the driver of the line output stage is of a low impedance current control. The driver stage using a transistor which is able to supply the necessary base control current for the driver transformer T501 of the output stage. To limit the inductive breaking peaks during the blocking phase, an RC combination has been connected in parallel to the primary winding of T501. The driver stage operates in alternating mode in relation to the output stage, i.e. when Q501 is rendered conductive. Q551 is off and vice versa. East/West Correction The EW geometry is output from pin 1 of IC501 (located on the A-Board) and fed to the D-Board via connectors A3-D3 pin 9 and applied to FET transistor Q703, here the signal is amplified before the EW signal is fed to the piggy-back demodulating diode D If fluctuation in the EHT occurs due to picture content, such as brightness and contrast variations the picture geometry may also vary. However via the EHT control line, which is fed back to the DG-Board, EHT monitoring the 144V line takes place. If any variations occur then the EW output is adjusted accordingly to ensure the optimum picture geometry.

21 4 - 3 Fokus Dynamic +15V 8 1 7 3 6 5 DAF To FBT +144V Q524 D7-DF1 2
Dynamic Automatic Focus (DAF) Euro 7 models have a Dynamic Automatic Focus (DAF) circuit, which is used to overcome the problems of poor focus at the outer edges of the picture which is normally associated with large screen CRTs. By using this DAF circuit, focus of the picture at the outer edges of the CRT are as clear as the centre portions of the picture. To provide this feature an additional circuit located on the DF-Board has been developed. This circuit is discussed in the following sections. DAF Processing To carry out DAF processing, horizontal and vertical pulses are fed from the DP-Board to the A-Board via connector A44 pins 23 (V-DAF) and 27 (H-DAF). Here the horizontal and vertical DAF pulses are then fed directly to the D-Board via connectors A3 - D3 pins 7 and 8, where the horizontal and vertical pulses are fed directly to the DF-Board via connectors D7 - DF1 pins 1(H-DAF) and 2 (V-DAF). On the DP-Board the horizontal DAF signal is fed directly to the base of transistor Q523. Here the horizontal DAF signal is amplified and fed via buffer transistor Q522, where the signal is fed via the FET transistor Q521 to T701 pin 5 at approximately 250Vpp. The vertical DAF signal which is fed from connector DF1 pin 2 is fed to the cascade connected transistors Q525, Q524. Here the signal is amplified to approximately 250Vpp before being fed to pin 3 of the DAF transformer T701. The DAF transformer T701 then combines both the horizontal and vertical DAF signals. These combined signals are then output via the HV terminal of T701, where the DAF signal is fed via connectors DF1 - D7 pins 7 and 8 to the DAF input terminal of the flyback transformer (FBT) T551, located on the A-Board. Here the signal is added to the focus voltage of T551. The combined focus voltage VF2 and DAF waveform is fed to the focus terminal of the CRT. By this method the focus voltage for the central and outer edges of the scan undergo alteration. This results in the focus voltage for the outer edges being reduced compared with that of the central area of the screen, thus increasing the focusing distance of the beam and enhancing focus at the outer edges. 2 1 5 +15V Q523 Q522 Q521 V DAF Q525 H DAF

22 4-5 Koreksi Geomagnetic Output Koreksi Tengah Output Detektor N-S(Y)
LC4801 IC4861 IC4804 IC4803 IC4805 GM2 Output Koreksi Sudut Detektor N-S(Y) Auto / Manual SW DetektorE-W(X) Output Koreksi Tengah RT1 GM1-A19 Q4802 Q4801 RT2 IC4801 IC4802

23 Output dari Flux Gate Magnet Meter
Vh + Max Vh - Max Utara Timur Selatan Barat CLICK

24 Kumparan Koreksi Center coil Rotation Coil N-S Coil Degausing coil
E-W Coil Degausing coil

25 2) Multi-standard Sound Processor
5 RANGKAIAN AUDIO 1) Input AV Switch 2) Multi-standard Sound Processor 3) Dolby & dts Digital Processor 4) Audio Output

26 5-1 Input AV Switch

27 5-2 Multi-standard Sound Processor
IC2001 MSP3410D SDA2 SCL2 NICAM / FM DEMODULATOR SIF 67 A/D 37 L TV R 60 TV AUDIO NICAM / A2 DECODER 36 A/D DPS L MAIN R 53 A/D 28 L MAIN R Audio Signal Processing The MSP3410D IC2001 is designed as a Multi-standard Sound Processor for processing of analogue and digital audio signals. This device differs from the MSP3410D used in previous chassis as the device is now packaged in PQFP (Pin Plastic Quad Flat Package) 80 pin package. However this device still provides all the processing under taken on previous chassis using the MSP3410D device. The MSP3410 IC2001 provides full TV sound processing of analogue sound IF signals-in, through to analogue AF-out, within a single chip which covers all European TV standards. As well as processing of the analogue audio signals, the MSP IC also processes the NICAM signal fed from the IF stage. DIGITAL SIGNAL PROSESSING DE-ENPHASIS FM identification BASE BAND Control BASS/ TREBLE EQUALIKZER LOUDNESS 54 27 INPUT SELECTORE 47 A/D 34 L Monitor R L SUB R A/D 46 33 A/D 25 59 L H.P. R L HP R 24 61 XTAL MHz

28 5-3 Digital Sound Processing
PROCESSOR SDA2 SCL2 IC2504 L ch L A/D R 22 R ch PCM DECODER 39 A/D Centre DIGITAL AUDIO DECODER DIGITAL AUDIO CONTROL 40 AC-3 DECODER 41 Surround Sound Processing Panasonic have for a number of years now produced models with Dolby Pro Logic and EURO 7 is no exception. However since the introduction of Dolby Pro Logic there have been new developments in the field of surround sound for the consumer product, which have now for the first time been introduced on the EURO 7 chassis for selected models. These new developments see the introduction of two digital audio formats used to provide surround sound, these being: Dolby Digital (initially called AC-3) Digital Theatre Sound (DTS) These new surround sound systems, as their names suggest, use digital techniques to produce the required multi-channel effects previously associated with Dolby Pro Logic. Processing of both Digital audio and Dolby Pro Logic sound processing being performed on an additional board named the DP- Board. DTS and Dolby Digital were both developed to reduce the amount of space need for storage, for example onto DVD (Digital Versatile Disk), or for transmission, when accompanied with data hungry digital video. This space saving is achieved by only using the data necessary to portray the original sound, in essence throwing away the rest (this type of coding is sometimes called “lossy” coding). A complex scheme or algorithm based upon the science of how we perceive sound selects the data to be stored and which is to be discarded. It is in this compression that these differences occur. A Dolby digital 5.1 channel is compressed by a ratio of 12:1, which is approximately 1/3 the space required for the equivalent DTS 5.1 channel. Woofer DIGITAL AUDIO DATA DTS DECODER 27 Surround L Surround R ROM/RAM IC2501 ROM Master Clock LR Clock S Clock

29 Industry Pertama “dts/Dolby Digital/Dolby Pro Logic”
5-4 Audio Output <P300 Series> Industry Pertama “dts/Dolby Digital/Dolby Pro Logic” Decoder Incorporated AFB Woofer Center Dolby Digital Encoding AC-3 audio compression of the encoder block consists of three basic operations. 1.In the first stage, the representation of audio signal is changed from time domain to frequency domain which is a more efficient domain in which to perform audio compression. 2.These newly converted frequency domain audio signals are then encoded. 3.Finally the audio signals are quantified and formatted into the audio elementary stream (ES) To achieve the basic processing mentioned above the encoder consists of the following blocks discussed below. Digital Theatre Sound (DTS) Encoding Digital Theatre Sound (DTS), like Dolby Digital, uses a digital audio compression algorithm which is highly flexible, operating over multiple channels of audio. The audio compression algorithm used by the DTS system is called Coherent Acoustics, which differs from the traditional compression methods like those used by the linear PCM coding system, which is used for storing music onto CD. The primary objective of the DTS system is to significantly improve the quality and the flexibility of audio reproduction in the home, beyond that of convential compact disc (CD). While at the same time ensuring greater audio recording and storage efficiency through modern digital audio data reduction techniques. L R Rear R Rear L

30 5-4 Audio Output Mode PHANTOM 3 Mode STEREO <P300 Series> Center
L R Rear R Rear L

31 <P200/250 Series> AFB Woofer L R

32 System AFB (Acoustic Feed Back )
Speaker Unit Power Amp + - Filter IC2303 IC2306 Acoustic Feedback Processing A supply voltage of 9V is fed via the potential divider resistors R2374 / R2400. Here the supply voltage used to bias the op-amps via the Vcc terminal pin 4 of IC2303, IC2306 and IC2307 is set to 1/2 Vcc, ensuring a full swing for the audio signals. To perform the Acoustic Feedback processing already mentioned, three AN6554 devices are used. The AN6554 is a quadruple op-amp device used to perform AFB, with IC2303 processing the right channel audio signal, IC2306 processing the left channel audio signal. IC is used to process the bass channel (woofer speaker) and provide processing of both left and right audio signals. The audio signals output from the MSP3410 IC2001 pins 27 (R) and 28 (L) are fed via transistors Q2002 (L) and Q2003 (R). Here the signal flow of the left and right channels differ depending on the model type. Microphone IC2305

33 6 JALUR KONTROL 1) COMMAND CONTROL 2) JALUR IIC BUS

34 MPU 6-1 Command In Control - REMOTE IN KEY SCAN IN + IC1101 SDA0 SCL0
GK8-A6 A1102-U2 2 4 22 20 5 REMOTE IN MPU TV/AV 124 KEY SCAN IN + IC1101 - SDA0 SCL0 SDA1 SCL1 SDA2 SCL2 FUNCTION STR IIC 0 IIC 1 IIC 2

35 MPU menggunakan 3 IIC bus untuk Kontrol.
6-2 IIC bus line MPU menggunakan 3 IIC bus untuk Kontrol. IIC 0 IC1301 GLOBAL CORE 1 (Main) IC1304 IC1305 IC1303 IC1315 IC1104 TNU1 TNU2 IC1253 IC2001 IC2501 IC2513 IC2515 IC3001 IIC 1 IIC 2 CIP GLOBAL CORE 2 (Sub) VDU RGB PROCESSOR EAPROM MAIN TUNER SUB TUNER DAC CONTROL MPS Dolby PROCESSOR AV SWITCH

36 7 RANGKAIAN CATU DAYA Garis Besar Rangkaian Primer Catu Daya Stand by 3) Switching AC Auto 4) Catu Daya Utama Primer 5) Catu Daya Utama Sekunder 6) Catu Daya Fly Back 7) Proteksi

37 7-1 Garis Besar Rangkaian Primer
Switching Voltage Stand-by + STBY 5V - Switching Voltage UTAMA AC IN + - Line Filter Power Supply Unit The STR-F6656, IC801 is used in the Euro 7 power supply to control and regulate the power supply operation. As well as the main power supply a standby power supply is also used. The benefits of which result in a reduction in the power consumption when in standby mode. DC130 ~400V SW Utama RL801 Degauss SW RL802 1 2 Q882 Power ON/OFF Dari Micro Controller Switch Degaussing Q883 / Q881 Degauss ON D2-A2

38 7-2 Power Stand-by - - - - + + D842 OSC + 1 2 + GK6-D20 Q882 1 D2-A2
STBY 5V D888 5 D842 + - C847 + - 2 5 C888 OSC 1.1. Standby Power Supply Circuit The standby power supply circuit which is situated on the D-PCB, is used to to keep the I.R. receiver, microcontroller and memory devices. These circuits require a 5V supply during standby so as a switch ON command from the remote control or local keys can be processed. This allows switch ON of the TV receiver from standby. Only these areas deemed necessary to allow the TV to react to the switch ON command in standby is fed this standby supply. In this way a low power consumption is achieved when in standby mode. The mains AC voltage which is supplied from the main TV On/Off switch S840, located on the K-Board, is supplied to the D-Board via connectors GK6-D20. Here the AC supply voltage splits into three paths. The first path sees the AC supply being fed to the normally open contact of the standby relay RL801, while the second path is fed to the degauss coil relay RL The third path has the AC supply being fed via the windings P2/P1 of the standby transformer T841. Rectification of this supply is half-wave rectification, which is performed by diode D843 located in the return path of the supply line. Smoothing is performed by capacitor C847 and over voltage protection of the input supply is provided by D842. While any spikes generated in the primary winding are dispersed via diode D847 and resistor R842. This half-wave rectified supply which is fed to IC841 pin 5 is used to produce a regulated standby supply of approximately 7.5V. This supply fed via pin 5 of IC841 is fed to the drain terminal of an internal MOSFET transistor. The switch ON of the internal MOSFET transistor is controlled by the soft start capacitor C843 connected at pin 1 of IC841. Once the internal MOSFET transistor is driven into conduction current flows via pin 5 (the drain) and pins 2, 3, 7 and 8 of IC841 which are connected to the source terminal of the internal MOSFET transistor. The MOSFET transistor continues to conduct until the end of the positive cycle, at which point due to the effects of the half wave rectification no more current flow occurs and the magnetic field begins to collapse transferring the energy to the secondary winding S1/S2 of T841. Once the positive cycle of the A.C. supply again becomes present current flows via the primary winding P1 / P2 to pin 5 of IC841 and the cycle previously described is repeated. C883 4 2 D846 + - D843 AC IN 1 2 + - GK6-D20 C885 Q882 1 D886 D885 RL801 Power ON/OFF D2-A2 Dari Micro Controller

39 7-3 Switching AC Auto AC Auto Switching
When main power switch is turned on, large electric current (In rush current) is flowed until C810 is charged. Specially AC voltage is 100 or 120V, in rush current becomes double compare with it of 220V . Therefore when main power switch is ON, In rush current flows to ground via Resistor R801. After Main power switching regulator is operated Thyristor D804 becomes ON. Then charged current is flowed to ground via D804.

40 7-4 Primer Main Power Ve Ve Q805 ON OFF H ON IC801 ON OFF
When the internal MOSFET transistor of IC801 conducts the current flows via the primary winding P2A/P2B and P1A/P1B of T801 and IC801 pin 3 (Drain) and pin 2 (source) causing a voltage drop across R810, R806 to develop. This voltage drop across R810, R806 is then fed back to pin 1 of IC801 via R819. This feedback voltage at pin 1 is then fed to an internal comparator which is used to detect when the voltage at pin 1 exceeds the internally generated 0.73V reference signal. When this condition is detected the internal MOSFET transistor is switched OFF. At the same time once IC801 begins to operate Vcc pin 4 is supplied from the drive winding V1/V2 as mentioned previously. This voltage developed in the drive winding is also fed via an RC Network consisting of D821, R836, C829, R837 and D820 (located between the drive winding of T801 and pin 1 of IC801) which is used to delay the switch ON of the internal MOSFET transistor, allowing zero current switching. This reduces switching losses that occur as a result of operating with high switching frequencies. When the internal MOSFET transistor of IC801 is switched OFF, as described earlier, the current flow via the primary winding P2A/P2B, P1A/P1B stops. This results in the collapse of the magnetic field of T801 and the energy stored in the primary winding is transferred to the secondary windings. When the internal MOSFET transistor of IC801 turns OFF the drain current (ID) does not fall linearly, this results in a small peak value being produced. As a result the VDS voltage which is high causes a turn-OFF loss (see diagram below). To reduce this switch OFF loss capacitor C823 and coil L812 are used to ’SNUB’ this peak value under the control of FET transistor Q805 which is switched on during this period by a gate biasing voltage fed for the primary winding P3 of T801. During this period the voltage at pin 1 of IC801 begins to fall at a rate determined by C829, R When the internal comparator of IC801 detects that the voltage at pin 1 is below the internally generated 0.73V reference signal the internal MOSFET transistor of IC801 is switched ON and the cycle is repeated. The power supply ON time is controlled by controlling the feedback supply to pin 1 of IC801. This is achieved by the use of the photocoupler D823. The photocoupler current varies in response to the current drawn via pin 2 of IC IC851. IC851 is used to monitor the B+ supply by comparing the B+ secondary voltage with an internally established reference voltage within IC851, which inturn controls the current drawn via pin 2. .If either the A.C. mains input voltage to SMPS gets higher, or the load current on the secondary gets smaller, pin 2 of IC851 sinks more current causing the opto-islator to conduct more. This causes the current flowing via the photocoupler D823 to pin 1 of IC801 to increase, resulting in the ON time of the internal MOS-FET transistor of IC801 becoming shorter. This in turn causes the secondary B+ level to return its normal value. Ve Q805 ON OFF H ON IC801 ON OFF

41 7-5 Second Main Power +20V -20V +15V +144V Secondary Side
On the secondary side the transformer supplies the following voltages: 144 voltage to supply the horizontal output and for those models with Dynamic Auto Focus (DAF), the DAF stage being located on the DF-Board. As well as this the +B supply is reduced to 30V by resistor R867 which is then fed to the tuners located on the A-Board. 15V supply is used to supply the horizontal driver stage and for those models with Dynamic Auto Focus (DAF) the DAF stage located on the DF-Board. The 15V supply also provides an operating voltage for the processing ICs and peripheral circuits. +20V used to supply the audio output stages. -20V used to supply the audio output stages. Although the secondary voltages are relatively stable with short term load variations being compensated for by IC801, it is still necessary to stabilize those voltages used for signal processing. In addition to the supply voltages mentioned above additional 3.3V, 5V, 8V, 9V and 12V supplies are produced and will be looked at later. (See Power block diagram on service manual.) +144V

42 7-6 Power Flyback EHT FOCUS2 SCREEN FOCUS1 +224V Heater +144V -15V

43 7-7 Rangkaian Proteksi L H ON OFF ON L H L