Riset Grup Embedded and Digital Design Inside XSA-50 Presented by Riset Grup Embedded and Digital Design PENS-ITS 2010
One meter view
Diagram block
Feature (1) Programmable logic 50-Kgate XS2S50 SpartanII FPGA 144pin PQFP, berfungsi sbg tempat utama programmable logic XC9572XL CPLD, berfungsi untuk mengkonfigurasi FPGA via paralel port dan mengontrol penulisan ke Flash RAM
Feature (2) Programmable Oscillator Dallas DS1075 programmable oscillator Maksimum clock 100Mhz Minimum clock 48.7KHz Memprogram pembagi clock menggunakan GXSSETCLK
Feature (3) Synchronous DRAM Buatan Hynix HY57V641620HGT-H atau Samsung K4S641632F-TC75000 Kapasitas 4M x 16-bit
Feature (4) Flash RAM Buatan Atmel AT49F001 Flash RAM Kapasitas 128K x 8-bit
Feature (5) 7-segmen Aktif high 4-position DIP Switch Aktif low, posisi ON menyebabkan pin yang terhubung ke switch tersambung ke ground. Bila tidak digunakan letakkan pada posisi OFF Resources sharing !
Resources sharing
Feature (6) PS/2 Port Pushbutton
Feature (7) VGA Monitor Interface
Feature (8) Paralel Port Interface Hati-hati dg resource conflict Baca manual
Feature (8) Paralel Port Interface
Feature (9) Prototype header
SpartanII architecture
CLB capacity
Inside a CLB A CLB contain 2 slice XC2S100 has 16x24 CLB matrix Or 768 slice
Let’s program the board